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2009 Final Program


2009 IEEE International Conference on

Microelectronic Systems Education 

Educating Systems Designers in the Multicore Ubiquitous Computing Era


Advance Program

Sponsored by The IEEE Computer Society Technical Committee on Design Automation

Saturday, July 25

8:30am-5:00pm Altera Tutorial

8:30am-12:00pm Cypress Tutorial – PSOC

8:30am-12:00pm NSF Tutorial – Asynchronous Logic

1:30pm-5:00pm Synopsys Tutorial

1:30pm-5:00pm Mentor Graphics Tutorial


Sunday, July 26

8:00-8:30am:   Registration and Continental Breakfast


8:30-8:45am:   Introduction and Welcome

The State of the Union in Microelectronics Systems Education

Dr. A. Rucinski, University of New Hampshire, General Chair


8:45-9:45am:   Keynote

Undergraduate Computer Science and Engineering Curriculum in the Multicore Era

Dr. T. N. Vijaykumar, Purdue University


9:45-10:00am: Break


10:00-11:00am:           Session 1: Multi-core Systems

Session Chair: Tina Hudson, Rose-Hulman Institute of Technology


Undergraduate Dual-Core Prototyping and Analysis of Factors Influencing Student Success on Dual-Core Designs

M.C. Johnson, E. Villasenor, O. Krachina, M. Thottethodi


FPGA-Based NoC-Driven Sequence of Lab Assignments for Manycore Systems

C. Ttofis, C. Kyrkou, T. Theocharides, M.K. Michael


Multicore Education Through Simulation

O. Ozturk


11:00-11:30am:           Break


11:30am-12:30pm:      Session 2: Tools for VLSI Education

Session Chair: Mark Johnson, Purdue University


DIAGNOZER: a Laboratory Tool for Teaching Research in Diagnosis of Electronic Systems

R. Ubar, A. Jutman, J. Raik , S. Kostin, H.D. Wuttke


Using Tablet PCs and Interactive Software in Integrated-Circuit Design Courses to Improve Learning

M. Simoni


Synopsys’ Open Educational Design Kit: Capabilities, Deployment and Future

R. Goldman, K. Bartleson, T. Wood, K. Kranen, C. Cao, V. Melikyan, G.Markosyan


12:30-2:00pm:             Lunch and Luncheon Keynote

Dr. Ted Kochanski, University of New Hampshire


2:00-3:30pm:               Session 3 : Posters

Poster Chair: John Nestor, Lafayette College


An Innovative Method of Teaching Digital System Design in an Undergraduate Electrical and Computer Engineering Curriculum

O. B. Adamo, P. Guturu, and M. R. Varanasi


Encouraging Reusable Network Hardware Design

G. A. Covington, G. Gibb, J. Naous, J. W. Lockwood, N. McKeown


LOGSYS: A Simple Tool for Complex Student Projects

B. Fehér, T. Raikovich, G. Dancsi, P. Laczkó


A Mixed TCAD/Electrical Simulation Laboratory to Open up the Microelectronics Teaching

J. M. Galliere, J. Boch


Teaching VLSI Design in 10 Weeks

M. R. Guthaus


Full-Custom Design Project for Digital VLSI and IC Design Courses using Synopsys Generic 90nm CMOS Library

E. Lyons, V. Ganti, R. Goldman, V. Melikyan, H. Mahmoodi


Project Based Learning Experience in VHDL Digital Electronic Circuit Design

F. Machado, S. Borromeo, N. Malpica


An FPGA-Based Wireless Network Capstone Project

J. A. Nestor, C. Nadovich


Improvements to an Electrical Engineering Skill Audit Exam to Improve Student Mastery of Core EE Concepts

D. W. Parent


From Gates to Embedded Systems: a Bottom-up Approach to Digital Design

G. Donzellini, D. Ponta


Improving Students’ Hardware and Software Skills by Providing Unrestricted Access to State of the Art Design Tools and Hardware Systems

M. Radu, C. Cole, M. Dabacan, J. Harris, S. Sexton


A Cross-Curriculum Open Design Platform Approach to Electronic and Computing Systems Education

M. Ravel, M. Chang, M. McDermott, M. Morrow, N. Teslic, M. Katona, J. Bapat


Interactive Hands-On Tools as Learning Objects on Web Services

T. Robal, A. Kalja


U-PAS : A User-Friendly ADC Simulator for Courses on Analog Design

B. D. Sahoo, B. Razavi


Towards Heterogeneous Microsystems Design-for-Test in a Graduate Student Environment

P. A. Stokes, R. E. Mallard


Vertical Integration of System-on-Chip Concepts in the Digital Design Curriculum

Y. Tang, L. M. Head, R. P. Ramachandran, L. M. Chatman


Teaching Embedded System Concepts for Technological Literacy

M. Winzker, A. Schwandt


Project Based e-Learning: a New Education Technique for Distance Learning in Smart Sensors Systems

S. Yurish


Incorporating Real World Integrated Circuit in a Liberal Arts Computer Science Program

P. Zhao, D. Moshier, M. Fahy


FreePDK v2.0: Transitioning VLSI Education Towards Nanometer Variation-Aware Designs

J. E. Stine, J. Chen, I. Castellanos, G. Sundararajan, M. Qayam, P. Kumar, J. Remington, S. Sohoni


Microelectronics Global Diffusion through Education

N. Ekekwe, A. C. Agu, C. Ekekwe


Extension of Micro/Nano-Electronics Technology Towards Photonics Education

F. Uherek, D. Donoval, J. Chovan


A Novel Approach to Teaching Microprocessor Design Using FPGA and Hierarchical Structure

R. Paharsingh, J. Skobla


CNT Logic Knowledge Module Integrated in Digital CMOS Logic Design Course

A. Kumari, S. Bhanja


Benefits Derived from Restructuring the Practical Component of an Introductory Course in Electronic Communication Systems

L. A. Clarke, J. Skobla


Microsystems, Microsensors and Microactuators: Research and Education

M. Husak, J. Jakovenko


3:30-4:00pm:               Break


4:00-5:00pm:               Session 4: Novel Curricula

Session Chair: John Lockwood, Stanford University


The Robot Competition: A Recipe for Success in Undergraduate Microcomputers Courses

J.A. Berlier, J.M. McCollum


Working with Industry to Create a Test and Product Engineering Course

T. A. Hudson, B. Copeland


Integrating Embedded Computing Systems into High School and Early Undergraduate Education

B. Benson, A. Arfaee, C. Kim, R. Kastner, R. Gupta


5:00-6:00pm:               Mixer


6:00-7:30pm                Dinner and Keynote

Education and the Internet

Patrick Dewilde, Director, Institute for Advanced Studies, TU Munchen, Germany





Monday, July 27


8:30-9:00 am:               Registration and Continental Breakfast


9:00-10:00am:             Keynote

The Parallel Revolution Has Started: Are You Part of the Solution or Part of the Problem?

Dr. David Patterson, U.C. Berkeley


10:00-10:15am:           Coffee Break


10:15-12:15pm:           Session 5 : Multi-core Education and Research Panel

Panel Chair: Alex K. Jones, University of Pittsburgh


Don Bouldin                   University of Tennessee

Patrick Dewilde              TU Munchen

William Joyner               Semiconductor Research Corp.

Ted Kochanski               University of New Hampshire

David Patterson             U.C. Berkeley

T. N. Vijaykumar            Purdue University


12:15-12:30pm:           Closing Remarks


1:00-6:00pm:               Demos at the SIGDA/DAC University Booth


Demonstrations of EDA tools, design projects, and instructional materials will be held in the SIGDA University Booth during DAC.




Sunday Opening Keynote Speaker

Dr. T. N. Vijaykumar

Purdue University


Undergraduate Computer Science and Engineering Curriculum in the Multicore Era



Increasing power dissipation and diminishing performance returns of uniprocessor architectures have led to the emergence of multicores as the prevalent architecture for high-performance, general-purpose microprocessors.  Multicores provide immense opportunities while posing formidable challenges for research in power-performance-programmability at all levels of the system stack. Equally importantly, multicorespose a great challenge for education, particularly at the undergraduate level. Though multicores have already  become ubiquitous in the general-purpose computer market segment, undergraduate computer science and engineering curricula are lagging behind in coverage of multicore concepts.  Most undergraduate programs include at most one or two courses on concurrency, typically at the senior level. This does not adequately cover the concepts.  In this talk, I will describe an NSF-funded project at Purdue to address some of these issues. Our approach has been to address hardware and software aspects of concurrency during every year of the undergraduate curriculum. Some of the challenges have been to make room for concurrency concepts in an already-packed curriculum, to tie all the concepts together, and to ensure sustained student participation and successful learning of the new concepts. Despite these and other challenges, upgrading the undergraduate curriculum to include concurrency concepts creates exciting opportunities to fundamentally improve the education of future generations of computer scientists and engineers.



T. N. Vijaykumar joined the School of Electrical and Computer Engineering at Purdue University in 1998 after completing his Ph.D. at the University of Wisconsin-Madison. His research interests are in computer architecture and he has published extensively on speculative threading, hard- and soft-error tolerance, low-power techniques, and multicore cache optimizations.  He received an NSF CAREER Award in 1999 and is listed in the International Symposium of Computer Architecture (ISCA) Hall of Fame. With his colleagues at Purdue, he currently co-leads an NSF CPATH project titled  "Extending a Bottom-Up Education Model to Support Concurrency from the First Year."





Sunday Dinner Keynote Speaker

Patrick Dewilde

Director, Institute for Advanced Study

TU Munchen, Germany

Education and the Internet



As the internet has become the ubiquitous medium for young and old alike to collect information and develop skills, the question arises if an intimate contact between tutor and pupil is necessary and how it can be arranged. Is it true that personal contact in transmitting 'the feel of knowledge' is inevitable, and if so, why? The internet is presently offering many attractive self tutoring programs, programs that correct student efforts in creating designs and present them with alternatives, games they can play in which the computer offers superior solutions etc... In this presentation I do not want to evaluate the most important offerings - surely the present conference will provide many impressive examples - but I want to explore a more fundamental question: do these programs indeed transfer the knowledge and the experience the students need, when do they succeed in doing a good job, and, inevitably, when is a personal contact unavoidable and why. A derived question is how such personal contacts can best be organized in view of what the internet offers. The conclusion might even be that the new wealth of information and possibilities require even more personal contact than ever before, but that the interactions have to be very carefully adapted to both what the internet offers and the tastes students have acquired since a very young age as citizens of the global web community. Quite a challenge for a modern teacher!



Patrick Dewilde received the degree of Electrical Engineer from the Katholieke Universiteit Leuven (Belgium) in 1966 and the Ph.D. degree from Stanford University in 1970. He has been a professor in Circuits and Systems at Delft University of Technology for 31 years, director of the Delft Institute of Microelectronics and Submicron Technology DIMES for 10 years and chairman of the Technology Foundation STW, responsible for funding major technology programs at Dutch Universities. Presently he is director of the Institute for Advanced Study of the Technische Universität München. He has had a continuous interest in the foundations of Electrical Engineering and has contributed to circuit and system theory as well as to methods in Computer Aided Circuit Design. He is an IEEE Fellow and has been awarded a knighthood in the Order of the Dutch Lion.




 Monday Opening Keynote Speaker

Dr. David Patterson

U. C. Berkeley

The Parallel Revolution Has Started: Are You Part of the Solution or Part of the Problem?



In December 2006 we published a broad survey of the issues for the whole field concerning the multicore/many core sea change (see We view the ultimate goal as being able to productively create efficient, correct, and portable software that smoothly scales when the number of cores per chip doubles biennially. This talk covers the specific research agenda that a large group of us at Berkeley are following (see as part of a center funded for five years primarily by Intel and Microsoft, with additional support from National Instruments, NEC, Nokia, NVIDIA and Samsung.


To take a fresh approach to the longstanding parallel computing problem, our research agenda will be driven by compelling applications developed by domain experts in personal health, image retrieval, music, speech understanding, and browsers. The development of parallel software is divided into two layers: an efficiency layer that aims at low overhead for 10 percent of the best programmers, and a productivity layer for the rest of the programming community--including domain experts--that reuses the parallel software developed at the efficiency layer. Key to this approach is a layer of libraries and programming frameworks centered around the 13 design patterns that we identified in the Berkeley View report. We rely on autotuning to map the software efficiently to a particular parallel computer. The role of the operating systems and the architecture in this project is to support software and applications in achieving the ultimate goal. Examples include primitives like thin hypervisors and libraries for the operating system and hardware support for partitioning and fast barrier synchronization. We will prototype the hardware of the future using field programmable gate arrays (FPGAs) on a common hardware platform being developed by the RAMP consortium of universities and companies (see



David Patterson was one of the pioneers of Reduced Instruction Set Computers, Redundant Arrays of Inexpensive Disks, and Networks of Workstations, and is co-author of two popular textbooks in computer architecture. He served as chair of the UC Berkeley Computer Science Division and the Computing Research Association, and as President of ACM. He received about 30 awards for research, teaching, and service, including being named a fellow of ACM, IEEE, and the Computer History Museum and membership in the National Academy of Engineering, the National Academy of Sciences, and the Silicon Valley Engineering Hall of Fame.



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